M I C H A E L   F.   K L E I N  PHD

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VLSI Design & Consulting

 

 

     

  

     

 

 
 

   

About Michael F. Klein

Dr. Klein provides comprehensive physical design and consulting services for advanced, high-performance custom, semi-custom, and COT CMOS VLSI designs. His focus is on project planning, circuit and physical design and methodologies, and chip integration.

With electrical engineering degrees from Caltech and UC Berkeley and over 15 years of technical and managerial experience in physical design at both large and small Silicon Valley chip companies, Dr. Klein's background is uniquely suited to deliver high-value design and consulting services in the following areas:

  • VLSI project planning, scheduling, risk assessment specializing in very high-performance, complex chips
  • Technical feasibility assessment and due diligence
  • Project milestone and metric development and tracking from conception through volume production
  • VLSI methodology development, specializing in circuit and physical issues such as hierarchical synthesis/P&R flows, floorplanning, post-layout timing, extraction, interconnect analysis including coupling and RC delay, library selection and qualification, noise analysis, power and clock distribution, and database organization
  • Advanced tool or flow development for key UDSM interconnect issues
  • VLSI tool evaluation and selection
  • Design strategies for testability (high quality and yield)
  • Design guideline development for specific tradeoffs among risk, performance, cost, schedule, team size
  • Circuit design and/or review: standard cells, custom elements, storage elements, SRAM, etc.
  • Characterization and test strategies for ensuring high yield in volume production
  • "Root cause" debug of chip functionality or yield issues

Dr. Klein has been a key contributor to numerous significant VLSI products since the late 1980s, including:

  • Sun Microsystems' UltraSparc-I, SuperSparc-I, and MicroSparc-I CPUs
  • Chromatic Research's Mpact-1 and Mpact-2 media processors
  • Velio Communications' VC10xx and VC20xx families of ultrahigh speed SerDes and network switch fabric product lines

Since 1986, when he joined Sun Microsystems , Dr. Klein has focused on physical design issues. He spent 7 years on SPARC CPU design teams, as a senior technical lead responsible for chip-level circuit and physical design on both the UltraSparc-I and MicroSparc-I programs. He made many key contributions to Sun's CPU programs to achieve faster and more reliable execution at both technical and management levels including project planning and tracking, chip integration, static timing analysis, and pioneering the use of DFT approaches to post-silicon critical path identification.

In 1994, Dr. Klein joined Xenon Microsystems, later named Chromatic Research, Inc., as Director of VLSI and Xenon's 7th employee, where he built and managed the circuit and physical design teams for the Mpact-1 and Mpact-2 media processor families. His responsibilities spanned the complete concept-to-production cycle for these products. Mpact-2 achieved production volume of over 1 million units, one of the earliest and most successful Rambus-based products prior to 2000. Chromatic Research was acquired in 1998 by ATI Technologies.

Dr. Klein joined Chip2Chip, Inc., later named Velio Communications, Inc., as Director of VLSI in 2000. While at Velio, he managed the circuit and physical design teams that taped out initial silicon for two product lines (VC1000 and VC2000 families) in 0.18 micron CMOS incorporating Velio's ultra-high speed serial link technology. A 15-million transistor grooming switch was successfully taped out in under 6 months from initial architectural closure, and first silicon was customer sampled.

Since mid-2001, Dr. Klein has consulted on high-performance VLSI issues as well as performing technical due diligence and analysis for venture capital.